AMD vs Intel benchmarks for latest chips

John at InsideHPC has a pointer to an article on benchmarks of the chips. There is no doubt that Intel is doing a good job on coming out with chips in a timely manner, something AMD is not doing well.
Regardless of my criticism, what is interesting are the real world tests. I don’t care so much about winrar and other things that, generally speaking, won’t impact my or my customers lives all that much.
I am a great deal more interested in applications benchmarks with real data sets that my customers run. Few run Linpack. Quite a few run LSDyna, and Fluent, and …

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As the market evolves …

I have been a strong proponent of accelerators for quite some time. Unfortunately, as indicated, it has been sadly, lacking success in trying to convince VCs and others to help fund the development we saw was needed. “The market will be there”, we said. “When” they asked. “Soon” we replied. That wasn’t good enough for them.
That was ~2 years ago. Now, free from much of the hype (though marketeers still inject a little every now and then), we see a rapidly developing accelerator marketplace. From leading the market to market bleeding edge, we are now seeing significant and sustained growth in accelerators.

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Why am I surprised that people found this surprising?

Must be something in the water. I dunno.
I reported on a simple program written to demonstrate roundoff error accumulation for a class I taught (the day job does teach parallel programming with OpenMP/MPI/… as we are contracted to), and why people should pay very careful attention to it when using floating point arithmetic.
Before I go into this, it is worth stealing some text from one of my slides on this. Computers know integers. They do not know real numbers. They know floating point numbers, which are approximations to real numbers. This distinction is important, and if you don’t pay attention to it, it will bite you. Hard.
That said, it is time to go down this short rabbit hole. It seems to be surprising for a fair chunk of programmers, so it is worth a read just to see it if you haven’t. This is by the way, one of a group of potential pitfalls to be avoided in parallel programming, or any programming system that allows you to re-order the way you perform mathematical operations.

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Data center growth numbers

From an article in Computerworld.. They note some results reported at a Gartner data center conference recently.
Before I go into this, please remember that I am still laughing over the Itanium2 installed base debacle that Gartner had “predicted” in the previous decade (and early part of this decade). So, as with all projections, take theirs with a few kg of salt.
What is most interesting is that they give current numbers. And these current numbers seem to agree with the vast majority of other reports, and fly in the face of the reports which (almost gleefully) predict imminent failure or reversal of fortunes of particular platforms.

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Expecting better of them

On thanksgiving in the US, there is much to reflect upon. Introspection: what you are doing right, and what you are not, is always good. We do quite a bit of it. Though on Thanksgiving, it is interspersed between the mashed potatoes, turkey, and other elements.
HPCwire appeared to do some introspection. Sort of. Their language and adoption of one side of a debate is, well, troubling.

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SGI heads for turbulence again?

Sadly I missed John West and the InsideHPC folks at Reno. This was my fault, it was my intention to drop by and say hi. I read InsideHPC and a few others frequently. Turns out, not frequently enough, as he noted something from the San Jose Mercury News on SGI.
Its “old” news now (more than 24 hours), but an SGI shareholder is pushing for a sale to a competitor. The rationale for this is to reduce the SG&A costs. This is basically the cost of sales, of running the company, and all the associated bits.

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SC07: day 2 recap

Well, for day 2 had very little in the way of looking at demos. It was a day of meetings. That and a BOF. Ok, I did get to see the D-Wave systems stuff and ask some questions. It is not precisely what I thought it was. In short, they map problems onto an Ising model, and then cool the chip. The mapping onto the Ising model may be understood in terms of constraints on the “spin” state of the model. Their software handles the conversion of constraints into Hamiltonians. I know some programmers can handle FPGAs using VHDL. Not sure how many can handle writing a potential function. D-Wave will handle that for you using a modified SQL statement. It is quite clever.

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