Knights Landing

Over at InsideHPC, Rich has a short take on Knights Landing with a link to the longer article.

This is implicitly the direction I thought things would be going in … drop in replacement CPUs to provide acceleration. Probably some big-small designs to handle OS tasks on specific cores (and reduce OS based jitter).

This said, 2x such sockets gets you to 72 lanes of PCIe gen 3. A little light for us, but we’ll figure something out (our current units are more than this). I didn’t see if its got QPI interconnects for multi-socket. It might not. But if it does, then it gets you 144 cores in a 2 socket system. It gets you very nice fast (500 GB/s!!) and large (16GB!!) cache.

Still want more details … it looks intriguing, but its possible that there are some issues within it that prevent it from being as useful as it can be. I’ve held out hope for Cell, ARM, MIPS, … and been burned by over-hype and under-delivery. I am somewhat more cautious now, so I’d say lets see what hits the ground, and understand it might take a few iterations to get right (and note that this is the N+1th iteration of Larrabee to begin with, so …)

I’ll say it sounds cool, but I am cautiously optimistic at this point, that something very good will come out of this. If my friends at Intel want to share a few units with us to try out/play with, we’d be happy to give better feedback.

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